Most of electric systems, e.g., a computer, a PCS, a cellur phone and a PDA, using semiconductor chips become highly integrated, miniaturized and lightweight for satisfying demands of users. As a design technique and a manufacturing process technique are developed, the semiconductor chips used in the electric systems become also highly integrated, miniaturized and lightweight. According to such trends, a semiconductor package becomes also miniaturized and lightweight, and various techniques for mounting at least two or more semiconductor chips on one PCB have widely been proposed.
Referring to FIG. 1, there is illustrated a first embodiment of a conventional semiconductor package. As shown in FIG. 1, in the conventional semiconductor package, a first chip 12, a second chip 14 and a third chip 16 are mounted on a PCB 10. Because such a semiconductor package must have a large area for mounting semiconductor chips thereon, it has a limitation to mount many semiconductor chips on the PCB.
In order to solve the above problem, there have been proposed various processes for stacking many semiconductor chips in one package.
Referring to FIG. 2, there is shown a second embodiment of a conventional semiconductor package. As shown in FIG. 2, a first chip 24 and a second chip 26 are stacked on a PCB 20. At this time, a resin for fixing the first chip 24 to the PCB 20 or the first chip 24 to the second chip 26 is provided in the semiconductor package and each of leads (not shown) of the first and second chips 24, 26 is connected with an exterior lead frame (not shown) of the PCB 20 by wires 28, thereby forming the semiconductor package.
The semiconductor package of a stacked type described above has a merit of decreasing an occupying area of the PCB; however, in case one chip has defects, it is impossible to exchange the chip with new one, such that the semiconductor package having a defective semiconductor chip cannot be used anymore.